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Why is 7 nm physical limits? How to see the crystal control range from 14 down to 1 nm nm?
Time£º2016/10/12 9:29:28

Apply for more than 20 years of Moore's law in recent years gradually had signs of failure. From the perspective of a chip manufacturing, 7 nm is the physical limits of silicon chip. However, according to foreign media reports at the Lawrence Berkeley national laboratory, a team broke the physical limits, using carbon nanotubes composite materials will be the top of the existing crystal control range from 14 down to 1 nm nm. So why say 7 nm is the physical limits of silicon chip, carbon nanotube composites is going on here? In the face of technological breakthroughs in the United States, China should do?

What concept is XX nm manufacturing process?

Chip manufacturing process often use 90 nm, 65 nm, 40 nm, 28 nm, 22 nm, 14 nm, such as Intel's latest six generations of core cpus used Intel own 14 nm manufacturing process. Now integrated within the CPU to billions of transistors, the transistor consists of the source, drain and is located in the grid between them, the current flow from the source to drain, the grid is control the circulation of electric fault.

The so-called XX nm actually referring to the CPU of complementary metal oxide semiconductor field effect transistor is formed on the width of the grid, also known as the gate length.

Shorter gate length, can be integrated on the same size of silicon wafer more transistors, Intel had announced a long boom from 130 nm to 90 nm, transistor take area will decrease by half; In the case of chip transistor integration rather, use more advanced manufacturing technology, the chip area and less power consumption, lower cost.

Grid can be divided into long lithography gate length and actual grating length, lithography gate length is determined by the lithography. Due to the light diffraction phenomenon in lithography and chip manufacturing experience even ion implantation, etching, steps, such as plasma washing, heat treatment and thus causes a photoetching grid and the actual gate long inconsistent. In addition, under the same process technology, the actual grating length will be different, such as samsung also introduced a 14 nm process technology of chips, but its chip actual 14 nm gate length and Intel process chip actual grid long still has certain gap.

Why is 7 nm physical limits?

Before explaining the integration of the CPU can shorten the length of the transistor gate more transistors or reduce the area of the transistor, and power, and cut the CPU cost of silicon wafers. It is, therefore, spare no effort to reduce the CPU manufacturers transistor gate width, in order to improve the integration of the number of transistors in per unit area. But it will also make electronic mobile distance shortened, easy to cause the transistor inner electrons spontaneously through silicon transistor channel base plate flow from cathode to anode movement, also is the leakage. And with the increase of chip number of transistors, originally only a few atoms thick layer of silicon dioxide insulation layer becomes thinner and more electronic leakage, leakage current and then increase the extra power consumption chip.

In order to solve the problem of leakage, Intel, IBM and other companies is sea, the situation. Such as Intel in its manufacturing process is a blend of high dielectric film and metal door integrated circuit in order to solve the leakage problem; IBM, SOI technology being developed in the source and drain is buried under a layer of strong electrolyte membrane to solve the leakage problem; In addition, there are technology, fin type field-effect transistors by increase the surface area of the insulation layer to increase the capacitance value, reduce the leakage current in order to prevent electron transition...

The above approach, grew up in a grid with 7 nm to some extent can effectively solve the problem of leakage. However, on the basis of using existing chip material, once the transistor gate length less than 7 nm, electrons in a transistor is easy to produce the tunnelling effect, brings the huge challenge for the chip manufacturing. In order to solve this problem, find new material to replace silicon production under 7 nm transistor is an effective solution method.

1 nm process transistor is still in the laboratory stage

Carbon nanotubes and graphene is very popular in recent years have certain connection, zero dimension of fullerenes, one dimensional carbon nanotubes, two-dimensional graphene belong to a family of carbon nanomaterials, and to each other after meet certain conditions can be transformed in the form. Carbon nanotubes is a kind of one-dimensional materials with special structure, its radial size can reach nanoscale, axial size of micron level, the ends of the tube sealing commonly, so it has great strength, and large length to diameter ratio is expected to make its excellent toughness is made of carbon fiber.

Carbon nanotubes and graphene in electrical and mechanical, etc have similar properties, good electrical conductivity, mechanical properties and thermal conductivity, which makes carbon nanotubes composite materials in supercapacitors, solar cells, display, biological detection, fuel cell has a good application prospect. In addition, doping some modifier composites of carbon nanotubes also received extensive attention of people, such as in graphene/carbon nanotube composite electrode add CdTe quantum dots make photoelectric switch, the production of doped metal particles field emission devices. The Lawrence Berkeley national laboratory for the foreign media reports, the top of the existing crystal control range from 14 down to 1 nm nm, the transistor is made of carbon nanotubes produced by doping molybdenum disulfide. But this only in the stage of laboratory technical breakthrough of technical achievements, there is no commercial production ability. As for the technology will become the mainstream commercial technology in the future, it remains to be time inspection.

Technological progress does not necessarily bring commercial benefits

In the past few decades, due to Moore's law in do play a role, make China's semiconductor manufacturing technology in the process of pursuing western has always been pulled out a distance abroad. In recent years, chip manufacturing technology progress slow, Moore's law is the objective phenomena of failure, for pursuing western China's semiconductor industry is a big positive. Moore's law failure, on the one hand, both the technology factors, advanced lithography, etching machine and other equipment and advanced chip manufacturing technology research and development technology is difficult, high capital requirement... On the other hand also has commercial factors.

In the manufacturing process to reach 28 nm, manufacturing process of every progress can make the chip manufacturers to obtain huge profits. To 14/16 nm, however, in the manufacturing process, technical progress can make chips instead of cost increased - in the Intel first developed 14 nm manufacturing process, there was news that its mask costs $300 million. Of course, with the passage of time and TSMC, samsung have 14/16 nm process, now the price should be not so expensive. But Intel is developing 10 nm process, according to Intel's official estimate, the mask cost at least $1 billion. In the new manufacturing process is expensive, on the one hand, is a new technology research and development of high cost and low yield, on the other hand also because lithography, etching machine and other equipment price is very expensive. So, even though technically mature advanced manufacturing technology, but due to the mask cost too high, can make customers in the choose to think twice before using the most advanced manufacturing technology, for example, if 10 nm manufacturing chip production is lower than 10 million piece, so the light spread to every chip mask costs $100, according to the international general low profit of the chip design company's pricing strategy 8:20 pricing - that is, hardware cost for 8 cases, priced at 20, don't think the price is high, in fact already very low, Intel's general pricing strategy is therefore, AMD once reached the history but... Even if not the chip cost and testing cost, the 10 nm CPU price will not less than $250. At the same time, the relatively small number of customers will lead to it is difficult to use the huge production sharing costs, and ultimately slow the enterprises for the development of advanced manufacturing technology and business applications. 28 nm manufacturing process is, therefore, was part of the personage inside course of study thinks, is dynamic, and still will be continue to use for several years.

China should be down-to-earth to solve practical problems

For the Lawrence Berkeley national laboratory to the top of the existing crystal control range from 14 down to 1 nm nm, americans don't have to think too highly of it, because this is just a technical breakthrough in laboratory, even to say the least, the technology is mature and can be commercialized, because of its difficulty is much greater than on the commercialization of Intel is developing 10 nm manufacturing process, the cost will be more high, this will make using the technology to produce the chip prices, this will lead to fewer customers choose the technology, and a vicious circle... From the commercial factors, most of the IC design companies I'm afraid I still will choose relatively mature, or called the manufacturing process of relatively "old".

For now China's semiconductor industry, instead of spending huge manpower and financial resources to explore the breakthrough 7 nm physical limits, it is better to use the limited manpower and financial resources for perfect 28 nm process technology of the IP library and realizing the commercial production of 14 nm manufacturing process. After all, for the national defense security, the existing manufacturing process has been fully covered (much of America's military chip is still 65 nm), for commercial chip, a lot of chip is not high to the requirement of process, such as industrial control, automotive electronics, chip radio frequency are used in some hardware enthusiasts look old process, and for mobile phones, tablet PC and in terms of CPU and GPU, 14 nm / 16 nm manufacturing process has the demand balance of performance and power consumption can be very good. The author thinks that, relative to cost a lot of resources to research and development of new materials breakthrough 7 nm physical limits, it is better to down-to-earth to solve practical problems.