Intel (corp.) wafer foundry process progress lags behind TSMC (2330), but the expert analysis, slowly but surely, Intel, 10, 14 nanometers nai metric cheng (2016), the expansion of progress by the end of today is pretty good. The graph is Intel executive (Brian Krzanich) again.
Barron ` s.com 3 reports, BlueFin Research Partners analyst Steve Mullane in observed after Intel's major semiconductor material supplier production data, points out that Intel is declining Fab 11 x factory, Arizona, new Mexico Fab 32 plant capacity, while Israel Fab 28 prepare to import 10 nai metric cheng early next year.
Report said, is located in Oregon, Arizona and Ireland three high capacity building, 14 nai metric cheng capacity continues to increase, and the old old cheng of the Fab 11 x factory will decrease.
Intel has just released in September 14 nai metric, "Kaby Lake" architecture of seventh generation Core processor series, also recently predicted in july-september revenue is expected to grow 15%, to run, Intel in data center/Internet of things (IoT)/to the long-term development of the memory is still pretty good.
Previously with foreign pointed out that Taiwan semiconductor wafer foundry ability, than Intel about one years ahead.
Barron ` s.com reported on September 27, the United States department of foreign investment issued a research report pointed out that TSMC in technology and process ARM process ability, wafer capacity, cost structure, production flexibility, balance sheet and overall value are more powerful than Intel. Although Intel microprocessor technology, the process is better, but the wafer foundry ability is behind the microprocessor manufacturing technology for at least two years, so probably a year or so later than TSMC. That is to say, Intel in the short term is difficult to produce substantial threat to TSMC.
TSMC, in contrast, the 10 nanometers, 7 nai metric cheng technology is behind the Intel, TSMC 1-2 years earlier than Intel entered seven nai metric, short to shrink the gap between the two companies. TSMC in exclusive packaging technology "integrated type fan out to encapsulate" (integrated fan - out, the InFO), is expected in 2017 and 2017, his 10 nanometers and seven nanometers wafer foundry market.
WCCFtech reported on September 25, TSMC r&d unit has set up a file in the internal meetings, reveal the latest development blueprint for the next few years, according to several senior high-rise, the end of this year will convert to 10 nanometers, seven nanometers in April 2 in Ming can order, and 16 nanometers FinFET compact process (FFC, more precision than 16 ff +) will also import this year. 7 nai metric process can dramatically improve power-saving efficiency (roughly 3.8 Ghz, core voltage pulse (vcore) 1 V), the critical voltage (threshold voltage) minimum of 0.4 V, applicable temperature is about 150 degrees.
