Global testing Taiwan team, rate is as high as 55.9%, but the panels, points out that the Taiwan semiconductor professional testing industry is facing a domestically; Is control more advanced testing technology at home and in the hands of giant, modernity is take the low price competition and active continental, mergers and acquisitions.
Observe this year Taiwan IC industry performance measurement, engineering institute industrial economy and the trend of research center (IEK) forecast, this year Taiwan's overall production scale IC test about nt $450 billion, 441.3 billion yuan to grow about 2% year on year, this year the IC packaging production forecast to grow 1.6% year on year, IC test industry output growth of 2.7% year on year.
From the global trends, industry institute IEK expected, global professional committee WaiFeng percentage to foundry (OSAT) output continued ascension, decreasing proportion integration components factory (IDM).
If separate packaging and testing, engineering institute IEK expectations, professional testing proportion ascending will faster than professional packaging.
Engineering institute IEK pointed out that the present global testing mitsuo tripartite confrontation, the United States and China mainland, Taiwan Taiwan team, accounts for the highest rate, as high as 55.9%, professional testing but Taiwan semiconductor industry is facing two big domestically.
First of all, Taiwan's small factory in mainland China threat. IEK pointed out that the mainland China policy supporting, mergers and acquisitions group, combined with the Chinese mainland market advantage, take low price war, threatening to Taiwan's small and medium-sized factory, especially for the low energy, advanced technology or product is too single small and medium-sized factory in Taiwan.
Taiwan, on the other hand, a line testing companies also cut to the higher order TSMC testing threat. Panels, said TSMC actively promote wafer level testing ability, through the advanced system Cheng Jing advantage, drive after a period of testing the business, including the protruding piece of wafer Bumping, InFO, 2.5 D and 3 D advanced packaging technology, such as gross margin is relatively high.
Observation testing industry development trends, panels, points out that the wafer level such testing technology is given priority to with logical products, have higher capital spending factory and maintenance, and therefore control mostly in the hands of giant, whole and favorable for funding and capacity resource allocation.
From the point of technology application side, panels, said the Internet of things (IoT), multi-function, miniaturization and low cost packaging trends, will lead the system level package (SiP), factory together with testing plant and system module and SiP development, cooperation advantage.
