"Continue to push down new process node is becoming more and more difficult, I don't know it (Moore's law) can last long." With IMEC, chief executive of Luc van den Hove interview, Gordon Moore said.
As the world's leading independent nanotechnology research center, on May 24 ~ 25, 2016 in Brussels, Belgium itf (IMEC global technology BBS), IMEC will once again to Moore's law as an important topic of discussion.
Can't deny that Moore's law is gradually to the limit. How the industry for the future technology development, already had "More Moore" (to continue Moore's law) and "wining Moore" (beyond Moore's law). With the two roads at the same time, to listen to on your higher-ups IMEC, may make the fog through the future more simple.
Moore's law will eventually stop?
"If in the future 10 years, scaling (smaller) came to an end, I wouldn't be surprised." Gordon Moore said.
Moore's law in recent 50 years are regarded as the "golden rule" of semiconductor industry. It is based on the reality that out of a law, refers to in the case of constant cost, integrated circuit can accommodate the number of transistors according to certain time exponentially. Among them, nearly all of the cost is reduced, from to the narrowing of the transistor size and to increase the diameter of the wafer.
However, in recent years, with the technology development of silicon tend to its physical bottlenecks, more and more people is pointed out that the lagging of Moore's law, even think that the law is coming to an end.
Moore himself has been revised with his claim. First published in 1965, his forecast is an integrated circuit is doubling every year the number of transistors; By 1975, will be changed to Moore is doubling every 2 years; By 1997, and instead is doubling every 18 months; By 2002, Moore admitted cut-size is beginning to slow; In 2003, he pointed out that Moore's law can also continue to 10 years.
But the reality is, cost will allow the law of a ceiling in advance. "In the field of integrated circuit, scaling has helped us achieve a smaller, faster and cheaper, lower energy consumption targets. But now, scaling is no longer as in the past, all of the above benefits at the same time." Luc van den Hove pointed out.
"Transition from 28 to 20 nano, rising costs for the first time we met transistor. And for a business leader, must do profits." Infineon, chief executive of Reinhard Ploss said.
He points out, although from a physical standpoint, there is currently no walk to semiconductor manufacturing technology limits, the size of the chip can be further narrowing, but from a business perspective has met the limit. From the perspective of the evolution of technology node, from 90 nm to 28 nm, transistor costs have been, according to Moore's law has fallen, there was a first inversion until 20 nm node.
Delay due to the technology of implementation, the original expectation in the 22 nm node is the introduction of the technology manufacturers have to take alternatives, such as taking multiple graphics auxiliary exposure technology, etc., but this will increase the number of mask technology, chip manufacturing costs are dramatically increased, process cycle extended. Currently, 16 nm process cost is very high, if continue to take infiltrating type multiple exposures lithography process technology, to 10 nm nodes, the cost may increase to 1 ~ 1.5 times.
In addition, with the advancement of scaling, the craft process technology development in perforation, lithography, tunneling, heat dissipation and so on is met more and more on technology bottleneck. To improve the lithography technology, but also solve the problem of heat dissipation, and technology to promote the required precision production equipment investment is becoming more and more high, these are all hinder the development of semiconductor, in accordance with the challenge of Moore's law to go forward.
"Exponentially has always been the characteristics of the semiconductor industry, and it will continue. But the growth rate and the rhythm of the node to the next technology may slow, gradually aligning with global GDP growth (global GDP growth of about 2% in 2015)." ASM, chief technology officer and r&d supervisor Ivo j. Raaijmakers said.
How to continue Moore's law?
"Scaling will continue, not only did I believe it will continue to be, and I think it has to continue." Luc van den Hove stresses. He was convinced that scaling is likely to continue for decades, but Moore's law will be changed, no longer involves only size scaling.
Ivo J.R aaijmakers agreed, he thinks that "due to demand, the industry will find a way to continue scaling, but it will be different, no longer entirely in accordance with the past traditional Moore's law and Dennard scaling (increasing number of transistors per unit area and power consumption remains unchanged)."
In fact, the industry does not need special concern. Mentor Graphics, President and chief executive of WALDEN C.R HINES said, "even if Moore's law destined to end, but there is a learning curve (learning curve)."
Previously, scaling has met the technical threshold for many times, but as the investment of various technical means to ensure the continuous function of Moore's law, such as the strain when 90 nm silicon, 45 nm when new material such as high k metal gate, when 22 nm tri-gate transistors, etc.
Ivo J.R aaijmakers points out, want to continue to promote the development of technology, we need to be in "material, process, structure," three dimensions of innovation. "IDM and Foundry manufacturer mainly by changing the line (Pipeline) architecture for structural innovation, equipment and materials suppliers mainly materials and technology innovation."
2 d scaling does will be more and more difficult, from an existing node to the next advance manufacturing technology need time will be longer and longer. And next node development, can take an entirely new architectural design. , in terms of equipment and technology FinFET will transition to the level of the nanowires (Lateral Nanowire), and Vertical nanowires (Vertical Nanowire). In the form of 3 d building, the original silicon wafer surface etching technology into multi-layer imprinting, again will these etching out the thin layer of silicon on the stacked connection.
"We need to make better use of the third space dimension. At the time of building 3 d an SRAM cell, for example, you can stack multiple cells. The FPGA is the same, you can also build a standard unit for stack again." Luc van den Hove pointed out.
Another possible way is heterogeneous, stacking of each chip can improve its load of work. Combined with silicon perforation technology and adapter plate technology, you can put the processor, such as storage chip integrated together. Based on the magnetic spin compared to CMOS circuits, and can be integrated with fewer components to create.
"Combining transistors stacked with heterogeneous integration, can continue to scaling, have been advancing to 3 nm process node." Luc van den Hove said.
In respect of lithography, IMEC thinks, EUV is a cost-effective printing solutions. Using wavelength of 13.5 nm EUV seen can be used for all the key layer of light, but has always been the industry has yet to solve the problem of EUV batch production.
"Perhaps we can see soon EUV really be put into use, but may need to use the corresponding flat technology." IMEC process technology, senior vice President of An Steegen said.
, Romania DE (fab), chief technology officer Gary Patton pointed out that the EUV lithography technology can reduce the process cycle time for 30 days, probably on each layer mask can save 1.5 days of time than the existing technology, but also can guarantee the smaller electronic parameter variables, stricter implementation of process control.
Gary Patton argues that EUV in 2018 and 2019, there may be a very small range use, and in 2020 comprehensive into manufacturing process.
Change the metal material is also a way of thinking. "Such as aluminum prepared copper prepared cobalt materials, ensure the possibility of a downward forward a technology node." Basf company executive vice President of the board and chief technology officer Martin Rudermuller pointed out. Below 10 nm process node, cobalt and copper materials compared with lower resistivity, adding the solution of cobalt materials can achieve bottom-up chemical sedimentary filling film space.
After the era of Moore's law?
"Moore's law is towards the finish, need to consider from the Angle of the whole system optimization, which can overcome the existing technical challenges, to achieve further appreciation." Infineon, chief executive of Reinhard Ploss emphasis. "When process node in commercial limit, we'll need a breakthrough innovation to change the situation."
He points out, if only emphasize the evolution of the process technology, not only need a lot of innovative elements, also leads to research and development funds have grown exponentially. "From integrated circuit semiconductor industry has evolved into integrated systems, system integration in the future will also continue to push forward."
Gradually improve the equipment brings effect has been reduced to the lowest, and system level optimization still has great potential. In a data center applications, for example, in the past we have through the equipment optimization, saves 2% of energy consumption; Now we through improving power, saves 8% of energy consumption; The future may be based on the data center to do optimization, energy saving 25% of energy consumption.
In addition to the currently used silicon CMOS, new technology and material also has the possibility, the wide bandgap semiconductor materials and devices, for example, has a great potential for development, the increase in demand and technical progress will promote its arrival. "The introduction of GaN (gallium nitride) can significantly reduce power consumption and power density of the leap, and SiC (SiC) and GaN can help to achieve high performance, etc." Reinhard Ploss said.
, of course, the industry is working on innovative thinking, looking for some new paradigm, such as quantum computation and neuromorphic computing. In neural computing, IMEC is to imitate the brain from hardware field internal connection structure, according to each neuron through its synapses are connected to the other 10 ~ 15000 neurons, the principle of the global neural communication solutions to be narrowed.
To new application requirements change may be beyond Moore's law in the application of the drive a strategic ideas, such as automatic driving, IoT, cloud data center will be to the growth of the outbreak in the next IC level applications. These applications require different sensors, low power consumption chip processor and highly integrated.
"Electronic component is now car production costs by about 30%, to 2020 could reach about 35%, to 2030 could reach about 50%." Audi car electronic and semiconductor technology center director and incremental semiconductor program director Berthold Hellenthal pointed out. This will require increasing software lines of code and increasing of the car, car, data flow between the vehicles.
IoT will evolution toward a more intelligent node. , semiconductor (Analog Devices), senior vice President and chief technology officer Peter Real, points out that it is included in the intelligent sensor node convert data into information technology, the future will also need to reduce overall energy consumption, reduce latency, loans and waste, make reactive iot predictive and real-time Internet of things.
"The evolution of IoT will be comprehensive, systemic hardware and software instead of hardware to software. Industrial IoT applications is facing the reality of the reality technology is not yet mature, chip level sensor (chip scale sensors), energy harvesting, ultra low power technology, process, package, etc. There are technical challenges." Peter said Real.
He said many applications will need to different nodes in a single signal chain have analysis ability, but there is another bandwidth, latency and energy consumption limits; System architecture will be crucial to carefully decide where to place storage, processors, algorithm and hardware accelerator, etc.; According to the industrial, health, cars, and other areas of the application, system architecture will be quite different.
Precision medical treatment will be a important domain of semiconductor technology can play a role in the future. "DNA sequencing has to catch up with the speed of Moore's law," Luc van den Hove pointed out. DNA sequencing is the key to the accurate medical factors, but often require up to one million yuan and ten million yuan level of cost. IMEC is trying to push the work progress, it has developed a set of photonic and electronic chips, the cost of DNA sequencing can be reduced by half.
