Moore's law published up to now has more than 50 years, the semiconductor industry in research and development of advanced process met the challenges of the day Intel (Intel) technology, vice President of hakuho (Peng Bai) (figure 1) in recent days in VLSI technology conference in 2016, according to Moore's Law (Moore 's Law) in the past, present and future opening speech, sharing of Intel's point of view. Although Moore's law will continue to continue, in recent years is always discussed in the industry of both sides, but from Intel's assessment of the data view, Moore's law still can continue for a long time in the future.

Intel technology, vice President of hakuho said that Moore's law does face a lot of tests, but there is still a breakthrough opportunity in the future.

Moore's law is the failure? Hakuho think premature

Hakuho, points out that in the past ten years, Moore's law is the notion of failure often triggered a heated discussion, but from all walks of life for the implication of Moore's law is often their expression. Moore's law in 1975, refers to the semiconductor industry every 18 to 24 months can integrate chip doubles the number of transistors. Therefore, under the condition of invariable in chip design, chip production costs will decreases because of area reduction, or you can use a similar production cost to produce more powerful chips.

From the point of view of wafer production costs, Moore's law in fact did not disappoint the semiconductor industry. So far, each new generation process of a single Transistor production costs (Cost Per Transistor, CPT) or trajectory according to Moore's law predicted to fall. Of CPT discussed it is worth noting that Intel does not include the process research and development, chip design, such as cost, but the cost is as the process precision and also continue to increase.

Hakuho think, wait until the new process of CPT remained at more than 89% of the previous generation process, also is the new process leads to less than 11% of the CPT reducing effect, claimed that Moore's law have failed, perhaps is quite reasonable.

New process can bring at present CPT cut effect is between 3 ~ 4 a, which is why Intel always don't think the reason of Moore's law has come to an end.

Looking to the future, the semiconductor industry continues to invest in advanced process, still can create considerable economic benefits.

Intel internal served as estimates, if stopped developing advanced process, in the next 10 years with existing process to produce chip, chip production cost will more than continuous investment in advanced process of twice. Advanced manufacturing processes and the research and development costs, which may be only the chip between 1 ~ 3 in the cost of manufacture.

Nextgen EUV lithography technology has been in the corner

But hakuho also admitted to continuously introduce more advanced semiconductor processes, in terms of technical and economic challenges encountered by really is more and more difficult, especially in the economy.

Intel, for example, in the 14th nai metric on imported Double exposure (Double Patterning) technology, to 193 nanometers infiltrating fading shadow the machine can be used to 14 nai metric process node. Facing 10 nai metric distance generation, Intel believes that as long as add a few more exposure, existing the machine still can continue to use in general, only production process will be longer and more complex, and cost will also increase, economic benefit is not very ideal.

Hakuho points out, want to use the method of more economic benefit smaller transistors size, the key is in the extreme ultraviolet (EUV) lithography technology. Although he didn't want to talk about positive Intel import EUV schedules, but said EUV has on the Corner, Around the Corner), suggested EUV not too far from the actual import.

On the other hand, using the most advanced process of semiconductor industry number of less and less, is an obvious fact, led to Moore's law said that one of the main causes of failure. Hakuho believes that the application of this phenomenon and each semiconductor industry facing the size of the market, mainly economic and technical problems. Do not admit, advanced process research and development and the cost is very high, not every application of semiconductor industry lock market size is big enough.

New material, new architectural heroines Hopefully with CMOS complementary

While Moore's law go today, has been facing more and more difficult problems, technical and economic benefits but hakuho pointed out that industry and academia are still hard for keep Moore's law go on, and on the base material, the design architecture for multiple attempts. Such as Carbon nanotubes (Carbon NanoTube, CNT) and Graphene (Graphene) and spin electronic (Spintronics), and other cutting-edge materials and technologies, has a great progress. In the future if there is further breakthrough, is expected to add new momentum to semiconductor manufacturing miniature.

Hakuho also stressed, however, because of the complementary metal oxide semiconductor (CMOS) semiconductor industry is the most common process, with a large scale economic benefit, therefore, even if the new material or new technology made significant breakthrough, start application on the wafer production, expected can't completely replace the CMOS position in the semiconductor industry. More likely scenario is that the semiconductor industry will take advantage of these new material or new technology to make up the deficiency of CMOS, forming some kind of mashup.

Continuation of Moore's law depends on the industrial chain to cooperate

Development faces many challenges, Moore's law has been recognized the fact. But hakuho think, as long as the semiconductor industry chain cooperation, still have the opportunity to overcome difficulties.

Have argues that thought, for example, the cost benefits of Moore's law can have less, even without considering the chip design and process research and development costs, such as lower CPT effect is the same as before. Hakuho response to this, the calculation of CPT involves many complicated factors, such as IC design would have obvious effects on the CPT.

Hakuho pointed out that the internal chip interconnection IC design is a big challenge, as the thinner, the longer the distance, winding connection circuit is more vulnerable to effect the speed of communication, but also tough heat dissipation problems. Wired segment after the wafer producers will process with the front electric crystal system synchronization propulsion, encountered one of the biggest concerns. If the chip designers to present a more innovative approach for the internal connection, can create a more CPT reduction effect.

Therefore, Moore's law will continue to go down, the efforts of the wafer production technology alone is not enough. The entire semiconductor industry chain must work together to get through every link have encountered bottlenecks.